Light emitting diodes (LEDs) are widely accepted as light sources in many applications that require low power consumption, small size, and high reliability. Energy-efficient diodes that emit light in the yellow-green to red regions of the visible spectrum often contain active layers formed of a III-phosphide alloy.
FIG. 1 illustrates a portion of a vertical thin film III-phosphide device, described in more detail in US 2011/0266568, which is incorporated herein by reference. In a vertical device, contacts are formed on the top and bottom surface of the semiconductor structure. Current is injected by the contacts and travels in a vertical direction. One drawback of vertical architecture is that given the electrode configuration, current tends to flow directly underneath the top contact and generate light preferentially in the active region directly beneath the top contact. Light generated directly beneath the top contact is likely to be absorbed by the top contact, which may decrease optical extraction from the device.
FIG. 1 illustrates a portion of the device 500 under a top n-contact 35. The device includes an n-type region 50, a light emitting or active region 52, a p-type region 54, and a p-type contact layer 56.
A mirror 45 embedded in the semiconductor structure prevents light from being generated underneath or absorbed by n-contact 35. Mirror 45 is formed in a trench 44 etched in the semiconductor device, which may be etched through active region 52. The trench may be aligned with and have the same width as n-contact 35. Trench 44 may extend into n-type region 50. Deeper trenches form more effective mirrors; however, the depth of trench 44 is limited by the need to spread current through n-type region 50 and to maintain the structural integrity of the semiconductor structure during processing and operation. The width at the bottom of trench 44, which forms the mirror under n-contact 35, may be the same as the width of n-contact 35. Trench 44 may have angled or straight sidewalls. Sidewalls are angled 30° to 60° relative to a normal to the top surface of the semiconductor structure in some embodiments and 45° relative to a normal to the top surface of the semiconductor structure in some embodiments. Angled sidewalls may be formed, for example, by heating a photoresist mask such that it reflows to form a sloped sidewall. The shape of the sloped sidewall is transferred to the semiconductor by dry-etching.
Trench 44 and the top surface of p-type contact layer 56 are lined with a dielectric material 58 such as SiO2 formed by, for example, plasma-enhanced chemical vapor deposition. Dielectric material 58 may be a single layer of material or multiple layers of the same or different materials. In some embodiments, the thickness of dielectric layer 58 is sufficient to ensure total internal reflection. The minimum necessary thickness for this effect is a fraction of an optical wavelength, and depends on the refractive index of the dielectric. For instance with a SiO2 dielectric layer 58, a thickness of at least 50 nm would be suitable, and a thickness as large as one or several microns could be used.
Mirror 45 includes a reflective conductive layer 62 (often a reflective metal layer such as silver or aluminum) and a dielectric layer 58. The dielectric layer is positioned between the semiconductor structure and the reflective conductive layer 62 and also provides electrical isolation in some embodiments. Reflective layer 62 may be, for example, silver, and may be deposited by, for example, evaporation or sputtering. Reflective layer 62 may be a single layer of material or multiple layers of the same or different materials. In some embodiments the thickness of reflective layer 62 is between 1000 Å and 5000 Å.
Light emitted in the direction of n-contact 35 is reflected by mirror 45 away from n-contact 35. In some embodiments, the sides of mirror 45 are sloped to direct light toward the top surface of the device. Light incident on the mirror at large angles is totally internally reflected by dielectric layer 58. Light incident on the mirror at small angles passes through the dielectric layer and is reflected by reflective layer 62.